Design of cost-efficient interconnect processing units : spidergon STNoC /
Design of cost-efficient interconnect processing units : spidergon STNoC /
Design of cost-efficient interconnect processing units spidergon STNoC [electronic resource] :
Marcello Coppola ... [et al.]
- Boca Raton, FL : Taylor & Francis , c2009
- xxi, 263 p. : ill. ; 25 cm. + 1 computer disc
- System-on-chip design and technologies .
- System-on-chip design and technologies .
Includes bibliographical references and index
9781420044713
Networks on a chip
ST Microelectronics
Microprocessors
Includes bibliographical references and index
9781420044713
Networks on a chip
ST Microelectronics
Microprocessors