MARC details
| 000 -LEADER |
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| fixed length control field |
02626nam a2200277 a 4500 |
| 001 - CONTROL NUMBER |
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| control field |
vtls000043314 |
| 003 - CONTROL NUMBER IDENTIFIER |
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| control field |
KUKTEM |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20251117150433.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
090904t2009 si a f b 001 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9780470824078 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
0470824077 |
| 039 #9 - LEVEL OF BIBLIOGRAPHIC CONTROL AND CODING DETAIL [OBSOLETE] |
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| Level of rules in bibliographic description |
201107131919 |
| Level of effort used to assign nonsubject heading access points |
VLOAD |
| Level of effort used to assign subject headings |
201011081233 |
| Level of effort used to assign classification |
jamie |
| -- |
200909041026 |
| -- |
nadia |
| 040 ## - CATALOGING SOURCE |
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| Original cataloging agency |
UMP |
| 090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (RLIN) |
|---|
| Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) |
TK7871.99.M44 K47 2009 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
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| Personal name |
Ker, Ming-Dou. |
| 245 10 - TITLE STATEMENT |
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| Title |
Transient-induced latchup in CMOS integrated circuits / |
| Statement of responsibility, etc. |
Ming-Dou Ker and Sheng-Fu Hsu |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
Singapore ; |
| -- |
Hoboken, NJ : |
| Name of publisher, distributor, etc. |
Wiley ; |
| Place of publication, distribution, etc. |
[Piscataway, NJ] : |
| Name of publisher, distributor, etc. |
IEEE Press, |
| Date of publication, distribution, etc. |
c2009 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xiii, 249 p. : |
| Other physical details |
ill. ; |
| Dimensions |
26 cm. |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
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| Bibliography, etc. note |
Includes bibliographical references and index |
| 505 0# - FORMATTED CONTENTS NOTE |
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| Formatted contents note |
Physical Mechanism of TLU under the System-Level ESD Test -- Component-Level Measurement for TLU under System-Level ESD Considerations -- TLU Dependency on Power-Pin Damping Frequency and Damping Factor in CMOS Integrated Circuits -- TLU in CMOS ICs in the Electrical Fast Transient Test -- Methodology on Extracting Compact Layout Rules for Latchup Prevention -- Special Layout Issues for Latchup Prevention -- TLU Prevention in Power-Rail ESD Clamp Circuits -- Appendix A: Practical Application Extractions of Latchup Design Rules in a 0.18-mm 1.8 V/3.3V Silicided CMOS Process |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
"Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process." -- Publisher’s description |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Metal oxide semiconductors, Complementary |
| General subdivision |
Defects |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Metal oxide semiconductors, Complementary |
| General subdivision |
Reliability |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Hsu, Sheng-Fu. |