00661nam a2200181 a 4500001001400000003000700014005001700021008004100038020002200079040000800101100002900109245013300138260004700271300004000318502006500358504002700423650002900450vtls000063628KUKTEM20251114204409.0120906t2012    my a   f m    000 0 eng d  aTHE0006917(Local)  aUMP0 aAhmad Syahiman Mohd Shah10aPattern layout optimization for low series resistance and capacitance in gan schottky barrier diodes /cAhmad Syahiman Mohd Shah  aFukui, Japan :bUniversity of Fukui,c2012  a70 p. :bill. (some col.) ;c30 cm.  aThesis (Master of Engineering) -- University of Fukui - 2012  aBibliography: p. 66-70 0aDiodes, Schottky-barrier