01164nam a2200289 a 4500 vtls000000423 KUKTEM 20251117142417.0 060606t2003 njua f 001 0 eng d 0130891614 201904301147 AUTHORITY 201904301029 AUTHORITY 201110281615 ida 201107131815 VLOAD 200606141058 VLOAD UMP TK7868.D5 C54 2003 Ciletti, Michael D. Advanced digital design with the Verilog HDL / Michael D. Ciletti Silos 2001 [electronic resource] Upper Saddle River, NJ: Pearson, 2003 xxi, 982 p. : ill. ; 25 cm. + 3 computer discs Includes index Digital electronics Logic circuits Computer-aided design Verilog (Computer hardware description language) Advanced digital design with the Verilog HDL Xilinx student : design environment and documentation Xilinx student : device files 0 0 lcc 0 0 20000 20000 2019-09-04 709.30 0 TK7868.D5 C54 2003 0000012709 2019-09-04 00:00:00 1 709.30 2019-09-04 OPEN 0 0 0 0 20000 20000 2019-09-04 0 CD 1114 | TK7868.D5 C54 2003 0000012711 2019-09-04 00:00:00 1 2019-09-04 ACCOM 0 0 0 0 20000 20000 2019-09-04 0 CD 1114 | TK7868.D5 C54 2003 0000012710 2019-09-04 00:00:00 1 2019-09-04 ACCOM 0 0 0 0 20000 20000 2019-09-04 0 CD 1114 | TK7868.D5 C54 2003 0000012712 2019-09-04 00:00:00 1 2019-09-04 ACCOM VIRTUA40 28692 28698 VTLSSORT0080*0200*0400*0900*1000*2450*2460*2600*3000*5000*6500*6501*6502*7400*7401*7402*9991