01296nam a22002537a 4500 vtls000020059 KUKTEM 20251117144316.0 070611 2006 xxu 000 0 eng d 0750679492 201107131917 VLOAD 200908141322 VLOAD 200908141254 VLOAD 200908131705 VLOAD 200706111622 training UMP QA76.76.D47 D78 2006 Drusinsky, Doron Modeling and verification using UML statecharts : a working guide to reactive system design, runtime monitoring and execution-based model checking / Doron Drusinsky Modeling and verification using UML statecharts [electronic resource] : a working guide to reactive system design, runtime monitoring and execution-based model checking Amsterdam : Newnes, 2006 xii, 294, 302, 306p. : ill. ; 23 cm. + 1 computer disc CD-ROM contains : Diagrams and code for the example in Chapter 4, Runtime code for monitoring, Automatic white box test generation UML (Computer science) Formal methods (Computer science) Computer software Development 0 0 lcc 0 0 20000 20000 2019-09-04 226.77 0 QA76.76.D47 D78 2006 0000023645 2019-09-04 00:00:00 1 226.77 2019-09-04 OPEN 0 0 lcc 0 0 10000 10000 2019-09-04 226.77 0 CD 2217 | QA76.76.D47 D78 2006 0000023646 2019-09-04 00:00:00 1 226.77 2019-09-04 ACCOM VIRTUA40 33635 33641 VTLSSORT0080*0200*0400*0900*1000*2450*2460*2600*3000*5050*6500*6501*6502*9991