Brunvand, Erik <br/><br/>
Digital VLSI chip design with Cadence and Synopsys CAD tools / 
Erik Brunvand 
 - Boston, MA :  Addison-Wesley,  c2010 
 - xvi, 571 p. :  ill. ;  24 cm. 
<br/><br/>Includes bibliographical references and index 
<br/><br/>Introduction -- Cadence DFII and ICFB -- Composer schematic capture -- Verilog simulation -- Virtuoso layout editor -- Standard cell design template -- Spectre analog simulator -- Cell characterization -- Verilog synthesis -- Abstract generation -- SOC encounter place and route -- Chip assembly -- Design example -- Appendix A : Tool and setup scripts -- Appendix B : Scripts to drive the tools -- Appendix C : Technology and cell libraries 
<br/><br/><label>ISBN: </label>9781926567556 0321547993 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Integrated circuits--Very large scale integration--Computer-aided design