TY  - BOOK
AU  - Coppola,Marcello
TI  - Design of cost-efficient interconnect processing units: spidergon STNoC 
T2  - System-on-chip design and technologies
SN  - 9781420044713
PY  - 2009///
CY  - Boca Raton, FL
PB  - Taylor & Francis
KW  - Networks on a chip
KW  - ST Microelectronics
KW  - Microprocessors
N1  - Includes bibliographical references and index
ER  -