01003nam a2200241   4500001001400000003000700014005001700021008004100038020001800079020001500097040000800112245017000120260005600290300004500346490006300391504005200454650007800506650002600584650003600610650003300646700002000679830006200699vtls000061492KUKTEM20251125093708.0120608t2002    pauda  f      001 0 eng d  a9781558996069  a1558996060  aUMP00aGate stack and silicide issues in silicon processing II :bsymposium held April 17-19, 2001, San Francisco, California, U.S.A. /ceditors, S.A. Campbell ... [et al.]  aWarrendale, PA :bMaterials Research Society,c2002  a1 v. (various pagings) :bill. ;c24 cm.1 aMaterials Research Society symposium proceedings ;vv. 670  aIncludes bibliographical references and indexes 0aIntegrated circuitsxUltra large scale integrationxMaterialsvCongresses 0aSilicidesvCongresses 0aGate array circuitsvCongresses 0aElectric leakagevCongresses1 aCampbell, S. A. 0aMaterials Research Society symposia proceedings ;vv. 670