01391nam a2200301   4500001001400000003000700014005001700021008004100038020001800079020001500097039004500112040000800157090002400165245017000189260005600359300004500415490006300460504005200523650007800575650002600653650003600679650003300715700002000748830006200768952013500830999002700965999009700992vtls000061492KUKTEM20251125093708.0120608t2002    pauda  f      001 0 eng d  a9781558996069  a1558996060 9a201304301525bhuday201206081008zsafura  aUMP  aTK7874.76 .G38 200200aGate stack and silicide issues in silicon processing II :bsymposium held April 17-19, 2001, San Francisco, California, U.S.A. /ceditors, S.A. Campbell ... [et al.]  aWarrendale, PA :bMaterials Research Society,c2002  a1 v. (various pagings) :bill. ;c24 cm.1 aMaterials Research Society symposium proceedings ;vv. 670  aIncludes bibliographical references and indexes 0aIntegrated circuitsxUltra large scale integrationxMaterialsvCongresses 0aSilicidesvCongresses 0aGate array circuitsvCongresses 0aElectric leakagevCongresses1 aCampbell, S. A. 0aMaterials Research Society symposia proceedings ;vv. 670  00104070a20000b20000d2019-09-04g103.81l0oTK7874.76 .G38 2002p0000073067r2019-09-04 00:00:00t1v103.81w2019-09-04yOPEN  aVIRTUA40c67244d67250  aVTLSSORT0080*0200*0201*0400*0900*2450*2600*3000*4900*5040*6500*6501*6502*6503*7000*8300*9992