02587nam a2200241 a 4500 vtls000037774 KUKTEM 20251114204356.0 090615t2008 my a f m 000 0 eng|d THE0005501(Local) 201905160947 hanafiah 201209071544 Fida 201112301302 ida 201107132255 VLOAD 200906151028 ida84 UMP QA119 .J89 2008 rs Bc. Ahmad Juzaili Alias An 16-bit fixed-point square root operation using VHDL / Ahmad Juzaili Bin Alias Kuantan, Pahang : UMP, 2008 67 p. : ill. (some col.); 30 cm. + 1 CD-ROM Project paper (Bachelor of Electrical Engineering (Electronics)) -- Universiti Malaysia Pahang - 2008 This thesis has the purpose to design and develop data filtering of 5-axis Inertial Measurement Unit (IMU) using Kalman Filter. This project endeavour to verify that the data from 5DOF IMU can be filtered using Kalman Filter method so that it can be used as an algorithm in motion alignment. The IMU consists of 2-axis of gyroscopes and 3-axis of accelerometer. The Kalman filter is a set of mathematical equations that provides an efficient computational (recursive) means to estimate the state of a process, in a way that minimizes the mean of the squared error. The main contribution of these algorithms is the in-motion alignment approach with unknown initial conditions. This study explores the use of Kalman filtering of measurements from an inertial measurement unit (IMU) to provide information on the orientation. The performances of each filter are evaluated in terms of the roll, pitch, and yaw angles. In this thesis, I had made an entire required analysis, design circuit, output and input data measurement and other important parameters to develop the data filtering of 5-axis IMU that can be implemented by using Kalman filter method. Simulation with constructed data has been done to verify the algorithm. Also the sensor errors and their effects are discussed. Furthermore the strategy for calibration, initialization and alignment for the system is proposed. On the other hand, this thesis is aim to provide objective and scope of the research, the literature review study, research methodology, and fabrication process with result analysis and conclusion as part requirement in submitted the thesis to FYP supervisor. Square root Digital electronics 0 0 0 1 20000 20000 2019-09-04 0 QA119 .J89 2008 rs Bc. 0000037370 2019-09-04 00:00:00 1 2019-09-04 PSM 0 0 0 1 20000 20000 2019-09-04 0 CD 3249 | QA119 .J89 2008 rs Bc. 0000037371 2019-09-04 00:00:00 1 2019-09-04 PSM VIRTUA40 937 943 VTLSSORT0080*0200*0400*0900*1000*2450*2600*3000*5020*5200*6500*6501*9992