TY  - BOOK
AU  - Taraate,Vaibbhav
TI  - SystemVerilog for hardware description: RTL design and verification 
SN  - 9789811544057
PY  - 2020///
CY  - Singapore
PB  - Springer
KW  - SystemVerilog (Computer hardware description language)
N1  - Includes bibliographical references
UR  - https://link-springer-com.libraryumpsa.idm.oclc.org/book/10.1007/978-981-15-4405-7
UR  - https://link.springer.com/book/10.1007/978-981-15-4405-7
ER  -