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| 001 | vtls000002930 | ||
| 003 | KUKTEM | ||
| 005 | 20251117142020.0 | ||
| 008 | 060614 t2001 caua f s001 0 eng d | ||
| 020 | _a0766811603 | ||
| 039 | 9 |
_a201905081525 _bAUTHORITY _c201108251141 _dFida _c201108251139 _dFida _c201107131646 _dVLOAD _y200606141110 _zVLOAD |
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| 040 | _aUMP | ||
| 090 | _aTK7872.L46 D84 2001 | ||
| 100 | 1 | _aDueck, Robert K. | |
| 245 | 1 | 0 |
_aDigital design with CPLD applications and VHDL / _cRobert K. Dueck |
| 246 | 3 |
_aDigital design with CPLD applications and VHDL _h[computer file] |
|
| 260 |
_aStamford, CT: _bDelmar Thomson Learning, _c2001 |
||
| 300 |
_axv, 846 p. : _bill. ; _c29 cm. ;+ _e1 computer disc |
||
| 500 | _aIncludes index | ||
| 650 | 0 |
_aProgrammable logic devices _xDesign and construction |
|
| 650 | 0 | _aLogic design | |
| 650 | 0 | _aProgrammable array logic | |
| 650 | 0 | _aVHDL (Computer hardware description language) | |
| 999 |
_aVIRTUA40 _c20695 _d20701 |
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| 999 | _aVTLSSORT0080*0200*0400*0900*1000*2450*2460*2600*3000*5000*6500*6501*6502*6503*9991 | ||