000			01164nam a2200289 a 4500
001			vtls000000423
003			KUKTEM
005			20251117142417.0
008			060606t2003 njua f 001 0 eng d
020			_a0130891614
039		9	_a201904301147 _bAUTHORITY _c201904301029 _dAUTHORITY _c201110281615 _dida _c201107131815 _dVLOAD _y200606141058 _zVLOAD
040			_aUMP
090			_aTK7868.D5 C54 2003
100	1		_aCiletti, Michael D.
245	1	0	_aAdvanced digital design with the Verilog HDL / Michael D. Ciletti
246	3		_aSilos 2001 _h[electronic resource]
260			_aUpper Saddle River, NJ: _bPearson, _c2003
300			_axxi, 982 p. : _bill. ; _c25 cm. + _e3 computer discs
500			_aIncludes index
650		0	_aDigital electronics
650		0	_aLogic circuits _xComputer-aided design
650		0	_aVerilog (Computer hardware description language)
740			_aAdvanced digital design with the Verilog HDL
740			_aXilinx student : _bdesign environment and documentation
740			_aXilinx student : _bdevice files
999			_aVIRTUA40 _c28692 _d28698
999			_aVTLSSORT0080*0200*0400*0900*1000*2450*2460*2600*3000*5000*6500*6501*6502*7400*7401*7402*9991