| 000 | 00873nam a2200229 a 4500 | ||
|---|---|---|---|
| 001 | vtls000019284 | ||
| 003 | KUKTEM | ||
| 005 | 20251117142426.0 | ||
| 008 | 070406 000 0 eng d | ||
| 020 | _a0387255389 | ||
| 039 | 9 |
_a201107131817 _bVLOAD _c200908141204 _dVLOAD _c200908141135 _dVLOAD _c200908131617 _dVLOAD _y200704060952 _zsri |
|
| 040 | _aUMP | ||
| 090 | _aTK7885.7 V37 2005 | ||
| 245 | 1 |
_aVerification methodology manual for System Verilog / _cJanick Bergeron |
|
| 260 |
_aNew York : _bSpringer , _cc2005 |
||
| 300 |
_axvi, 503p. : _bill, ; _c24 cm. |
||
| 504 | _aIncludes bibliographical references and index | ||
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 |
_aIntergrated circuits _xVerification |
|
| 700 | 1 | _aBergeron, Janick. | |
| 999 |
_aVIRTUA _c28990 _d28996 |
||
| 999 | _aVTLSSORT0080*0200*0900*2450*2600*3000*5040*6500*6501*7000*9991 | ||