| 000 | 00960nam a2200253 a 4500 | ||
|---|---|---|---|
| 001 | vtls000018001 | ||
| 003 | KUKTEM | ||
| 005 | 20251117144248.0 | ||
| 008 | 070207 000 0 eng d | ||
| 020 | _a0534551610 | ||
| 039 | 9 |
_a201107131900 _bVLOAD _c200908141259 _dVLOAD _c200908141231 _dVLOAD _c200908131651 _dVLOAD _y200702071053 _zfarina |
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| 040 | _aUMP | ||
| 090 | _aTK7868.L6 L447 2006 | ||
| 100 | 1 | _aLee, Sunggu | |
| 245 | 1 |
_aAdvanced digital logic design : _busing Verilog, state machines, and synthesis for FPGAs / _cSunggu Lee |
|
| 260 |
_aToronto, Ont. : _bThomson, _cc2006 |
||
| 300 |
_axvii, 462 p. : _bill. ; _c24 cm. |
||
| 500 | _aIncludes index | ||
| 650 | 0 |
_aLogic design _xData processing |
|
| 650 | 0 | _aDigital electronics | |
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 | _aSequential machine theory | |
| 999 |
_aVIRTUA _c32692 _d32698 |
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| 999 | _aVTLSSORT0080*0200*0900*1000*2450*2600*3000*5000*6500*6501*6502*6503*9991 | ||