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_dVLOAD
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_zfarina
040 _aUMP
090 _aTK7868.D5 N38 2006
100 1 _aNavabi, Zainalabedin
245 1 0 _aVerilog digital system design :
_brt level synthesis, testbench and verification/
_cZainalabedin Navabi
246 1 _aCD-ROM to accompany : verilog digital system design
250 _a2nd ed.
260 _aNew York ;
_aChicago :
_bMcGraw-Hill ,
_c2006
300 _axvi, 384 p. :
_bill. ;
_c24 cm. +
_e1 computer disc
500 _aIncludes index
500 _aCover title: Verilog digital system design :
_bregister transfer level synthesis, testbench and verification
650 0 _aVerilog (Computer hardware description language)
650 0 _aElectronic digital computers
_xComputer-aided design
999 _aVIRTUA
_c33167
_d33173
999 _aVTLSSORT0080*0200*0400*0900*1000*2450*2460*2500*2600*3000*5000*5001*6500*6501*9991