| 000 | 01313nam a2200277 a 4500 | ||
|---|---|---|---|
| 001 | vtls000001890 | ||
| 003 | KUKTEM | ||
| 005 | 20251117144410.0 | ||
| 008 | 060606t2006 xxca f 001 0 eng d | ||
| 020 | _a053446629X | ||
| 039 | 9 |
_a201207031148 _bida _c201107131932 _dVLOAD _c201106081246 _dtraining _c200908141342 _dVLOAD _y200606141105 _zVLOAD |
|
| 040 | _aUMP | ||
| 090 | _aTK7871.99.M44 U94 2006 | ||
| 100 | 1 |
_aUyemura, John P. _q(John Paul) _d1952- |
|
| 245 | 1 | 0 |
_aChip design for submicron VLSI : _bCMOS layout and simulation / _cJohn P. Uyemura |
| 246 | 3 |
_aCD-ROM to accompany Uyemura's chip design for submicron VLS _h[electronic resource] |
|
| 260 |
_aToronto : _bThomson/Nelson, _c2006 |
||
| 300 |
_axvi, 411 p. : _bill. ; _c25 cm. + _e1 computer disc |
||
| 504 | _aIncludes bibliographical references and index | ||
| 538 | _aSystem requirements: Windows 98SE, XP, 2000 or NT, 64 MB system RAM, Pentium or compatible CPU | ||
| 650 | 0 |
_aMetal oxide semiconductors, Complementary _xDesign and construction |
|
| 650 | 0 |
_aIntegrated circuits _xVery large scale integration _xDesign and construction |
|
| 650 | 0 | _aMicrowind | |
| 740 | _aChip design for submicron VLSI: CMOS layout and simulation | ||
| 999 |
_aVIRTUA40 _c35513 _d35519 |
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| 999 | _aVTLSSORT0080*0200*0400*0900*1000*2450*2460*2600*3000*5040*5380*6500*6501*6502*7400*9992 | ||