000 00830nam a2200217 a 4500
001 vtls000029293
003 KUKTEM
005 20251117144604.0
008 080604t2008 xxkdp f 001 0 eng d
020 _a9780470031360
039 9 _a201107132023
_bVLOAD
_c200908141449
_dVLOAD
_c200908141420
_dVLOAD
_c200908131759
_dVLOAD
_y200806041543
_znorsaini
040 _aUMP
090 _aTK7871.99.M44 B56 2008
100 1 _aBinkley, David M.
245 1 0 _aTradeoffs and optimization in analog CMOS design /
_cDavid M. Binkley
260 _aChichester, England :
_bJohn Wiley & Sons ,
_cc2008
300 _axxxv, 594 p. :
_bill. ;
_c25 cm.
500 _aIncludes index
650 0 _aMetal oxide semiconductors, Complementary
_xDesign and construction
999 _aVIRTUA40
_c39375
_d39381
999 _aVTLSSORT0080*0200*0400*0900*1000*2450*2600*3000*5000*6500*9991