| 000 | 01318nam a2200313 a 4500 | ||
|---|---|---|---|
| 001 | vtls000029294 | ||
| 003 | KUKTEM | ||
| 005 | 20251117145257.0 | ||
| 008 | 080604s2008 enka b 001 0 eng | ||
| 020 | _a9780470060704 | ||
| 020 | _a0470060700 | ||
| 039 | 9 |
_a201107132104 _bVLOAD _c200908141544 _dVLOAD _c200908141515 _dVLOAD _c200908132043 _dVLOAD _y200806041546 _znorsaini |
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| 040 | _aUMP | ||
| 090 | _aTK7885.7 .M54 2008 | ||
| 100 | 1 | _aMinns, Peter D. | |
| 245 | 1 | 0 |
_aFSM-based digital design using Verilog HDL / _cPeter Minns, Ian Elliott. |
| 246 | 3 | _aFinite state machine based digital design using Verilog HDL | |
| 246 | 3 |
_aSynapticad : tools for the thinking mind _h[electronic resource] |
|
| 260 |
_aChichester, England ; _aHoboken, NJ : _bJ. Wiley & Sons, _cc2008. |
||
| 300 |
_axiii, 391 p. : _bill. ; _c26 cm. + _e1 CD-ROM. |
||
| 504 | _aIncludes bibliographical references and index. | ||
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 | _aDigital electronics. | |
| 650 | 0 | _aSequential machine theory. | |
| 700 | 1 | _aElliott, Ian D. | |
| 856 | 4 | 1 |
_3Table of contents only _uhttp://www.loc.gov/catdir/enhancements/fy0804/2007043838-t.html |
| 999 |
_aVIRTUA40 _c42936 _d42942 |
||
| 999 | _aVTLSSORT0080*0200*0201*0400*0900*1000*2450*2460*2461*2600*3000*5040*6500*6501*6502*7000*8560*9991 | ||
| 942 | 0 | 0 | _01 |