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|---|---|---|---|
| 001 | vtls000029292 | ||
| 003 | KUKTEM | ||
| 005 | 20251117145258.0 | ||
| 008 | 080604s2008 njua b 001 0 eng | ||
| 020 | _a9780470823231 | ||
| 039 | 9 |
_a201107132103 _bVLOAD _c200908141543 _dVLOAD _c200908141514 _dVLOAD _c200908132043 _dVLOAD _y200806041534 _znorsaini |
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| 040 | _aUMP | ||
| 090 | _aTK7868.D5 L53 2008 | ||
| 100 | 1 | _aLin, Ming-Bo. | |
| 245 | 1 | 0 |
_aDigital system design and practices : _busing Verilog HDL and FPGAs / _cMing-Bo Lin. |
| 260 |
_aHoboken, NJ : _bJ. Wiley & Sons, _c2008. |
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| 300 |
_axxiv, 809 p. : _bill. ; _c25 cm. |
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| 500 | _aIncludes bibliographical references and index. | ||
| 650 | 0 | _aDigital electronics. | |
| 650 | 0 | _aField programmable gate arrays. | |
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 856 | 4 | 1 |
_3Table of contents only _uhttp://www.loc.gov/catdir/enhancements/fy0810/2008002506-t.html |
| 999 |
_aVIRTUA40 _c42994 _d43000 |
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| 999 | _aVTLSSORT0080*0200*0400*0900*1000*2450*2600*3000*5000*6500*6501*6502*8560*9991 | ||