| 000 | 01660nam a2200361 a 4500 | ||
|---|---|---|---|
| 001 | vtls000033208 | ||
| 003 | KUKTEM | ||
| 005 | 20251117145335.0 | ||
| 008 | 081201t2008 maua f b 001 0 eng d | ||
| 020 | _a9780077211646 | ||
| 020 | _a0077211642 | ||
| 020 | _a0073380334 (hard copy : alk. paper) | ||
| 020 | _a9780073380339 (hard copy : alk. paper) | ||
| 020 | _a0073317527 (CD ROM) | ||
| 020 | _a9780073317526 (CD ROM) | ||
| 039 | 9 |
_a201107132123 _bVLOAD _c200908141609 _dVLOAD _c200908141542 _dVLOAD _c200908132059 _dVLOAD _y200812011425 _znadia |
|
| 040 | _aUMP | ||
| 090 | _aTK7868.L6 B76 2008 | ||
| 100 | 1 | _aBrown, Stephen | |
| 245 | 1 | 0 |
_aFundamentals of digital logic with Verilog design / _cStephen Brown and Zvonko Vranesic |
| 246 | 3 |
_aAltera quartus II version 6.1 to accompany fundamentals of digital logic with Verilog design, second edition _h[electronic resource] |
|
| 250 | _a2nd ed. | ||
| 260 |
_aBoston : _bMcGraw-Hill Higher Education, _cc2008 |
||
| 300 |
_axix, 935 p. : _bill. ; _c25 cm. + _e1 CD-ROM |
||
| 504 | _aIncludes bibliographical references and index | ||
| 650 | 0 |
_aLogic circuits _xDesign and construction _xData processing |
|
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 |
_aComputer _xAided design |
|
| 700 | 1 | _aVranesic, Zvonko G. | |
| 856 | 4 | 1 |
_3Table of contents only _uhttp://www.loc.gov/catdir/toc/ecip0712/2007008622.html |
| 856 | 4 | 2 |
_3Contributor biographical information _uhttp://www.loc.gov/catdir/enhancements/fy0803/2007008622-b.html |
| 999 |
_aVIRTUA40 _c44222 _d44228 |
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| 999 | _aVTLSSORT0080*0202*0203*0200*0201*0204*0205*0400*0900*1000*2450*2460*2500*2600*3000*5040*6500*6501*6502*7000*8560*8561*9991 | ||