000 01013nam a2200265 a 4500
001 vtls000035764
003 KUKTEM
005 20251117145335.0
008 090430t2008 flua f 001 0 eng d
020 _a9781420074154
020 _a1420074156
039 9 _a201107132121
_bVLOAD
_c200912141133
_djamee
_c200908141608
_dVLOAD
_c200908141540
_dVLOAD
_y200904301011
_znadia
040 _aUMP
090 _aTK7868 .D5 C38 2008
100 1 _aCavanagh, Joseph J. F.
245 1 0 _aDigital design and Verilog HDL fundamentals /
_cJoseph Cavanagh
260 _aBoca Raton :
_bCRC Press,
_cc2008
300 _a1147 p. :
_bill. ;
_c27 cm.
500 _aIncludes index
650 0 _aLogic circuits
_xComputer-aided design
650 0 _aVerilog (Computer hardware description language)
650 0 _aDigital electronics
856 4 1 _aTable of contents only
_uhttp://www.loc.gov/catdir/toc/ecip0814/2008012851.html
999 _aVIRTUA40
_c44242
_d44248
999 _aVTLSSORT0080*0200*0201*0400*0900*1000*2450*2600*3000*5000*6500*6501*6502*8560*9991