000 01688nam a2200349 a 4500
001 vtls000033170
003 KUKTEM
005 20251117145405.0
008 081201t2009 nyua f 001 0 eng d
020 _a0073529532 (hbk. : alk. paper)
020 _a9780073529530 (hbk. : alk. paper)
020 _a0071287655 (pbk.)
020 _a9780071287654 (pbk.)
039 9 _a201107132135
_bVLOAD
_c200908141626
_dVLOAD
_c200908141600
_dVLOAD
_c200908132110
_dVLOAD
_y200812011117
_znadia
040 _aUMP
090 _aTK7888.4 .B76 2009
100 1 _aBrown, Stephen D.
245 1 0 _aFundamentals of digital logic with VHDL design /
_cStephen Brown and Zvonko Vranesic
246 3 _aFundamentals of digital logic with VHDL design
_h[electronic resource]
250 _a3rd ed.
260 _aNew York, NY :
_bMcGraw-Hill,
_cc2009
300 _axx, 939 p. :
_bill. (some col.) ;
_c24 cm. +
_e1 CD-ROM.
440 0 _aMcGraw-Hill series in electrical and computer engineering
500 _aIncludes index
500 _aAccompanying CD-ROM contains Altera's Quartus II CAD system and all VHDL examples presented in the book
538 _aMinimum system requirements (PC): Pentium III processor or later; Windows XP or later; USB port for connecting a USB-Blaster; TCP/IP networking protocol installed; Internet Explorer 6.0 or later
650 0 _aLogic circuits
_xDesign and construction
_xData processing
650 0 _aLogic design
_xData processing
650 0 _aVHDL (Computer hardware description language)
700 1 _aVranesic, Zvonko G.
999 _aVIRTUA40
_c45272
_d45278
999 _aVTLSSORT0080*0200*0201*0202*0203*0400*0900*1000*2450*2460*2500*2600*3000*4400*5000*5001*5380*6500*6501*6502*7000*9991