000 01048nam a2200277 a 4500
001 vtls000044053
003 KUKTEM
005 20251117145611.0
008 090914t2007 flua f 001 0 eng d
020 _a1420051547
020 _a9781420051544
039 9 _a201107132251
_bVLOAD
_c201008201047
_djamie
_c201008201046
_djamie
_c201008201044
_djamie
_y200909141102
_zsafura
040 _aUMP
090 _aTK7868.D5 C38 2007
100 1 _aCavanagh, Joseph J. F.
245 1 0 _aVeriIog HDL :
_bdigital design and modeling /
_cJoseph Cavanagh
260 _aBoca Raton, FL :
_bCRC Press,
_cc2007
300 _axviii, 900 p. :
_bill. ;
_c26 cm.
500 _aIncludes index
650 0 _aDigital electronics
650 0 _aLogic circuits
_xComputer-aided design
650 0 _aVerilog (Computer hardware description language)
856 4 2 _aPublisher description
_uhttp://www.loc.gov/catdir/enhancements/fy0626/2006052725-d.html
999 _aVIRTUA40
_c49624
_d49630
999 _aVTLSSORT0080*0200*0201*0400*0900*1000*2450*2600*3000*5000*6500*6501*6502*8560*9991
942 0 0 _01