000 01129nam a2200277 a 4500
001 vtls000041466
003 KUKTEM
005 20251117150137.0
008 090817t2009 flua f 001 0 eng d
020 _a9781420044713
039 9 _a201107132328
_bVLOAD
_c201006171135
_dida
_y200908171300
_znadia
040 _aUMP
090 _aTK5105.546 .D47 2009
245 0 0 _aDesign of cost-efficient interconnect processing units :
_bspidergon STNoC /
_cMarcello Coppola ... [et al.]
246 3 _aDesign of cost-efficient interconnect processing units
_h[electronic resource] :
_bspidergon STNoC
260 _aBoca Raton, FL :
_bTaylor & Francis ,
_cc2009
300 _axxi, 263 p. :
_bill. ;
_c25 cm. +
_e1 computer disc
490 1 _aSystem-on-chip design and technologies
504 _aIncludes bibliographical references and index
650 0 _aNetworks on a chip
650 0 _aST Microelectronics
650 0 _aMicroprocessors
700 1 _aCoppola, Marcello
830 0 _aSystem-on-chip design and technologies
999 _aVIRTUA40
_c52311
_d52317
999 _aVTLSSORT0080*0200*0400*0900*2450*2460*2600*3000*4900*5040*6500*6501*6502*7000*8300*9991