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_basmadi
_c201107131637
_dVLOAD
_c200908140957
_dVLOAD
_c200908140934
_dVLOAD
_y200606141105
_zVLOAD
040 _aUMP
090 _aTK7871.99.M44 B35 2005
100 1 _aBaker, R. Jacob
245 1 0 _aCMOS circuit design, layout, and simulation /
_cR. Jacob Baker
250 _a2nd ed
260 _aNew York:
_bIEEE Press,
_c2005
300 _axxxiii, 1038 p.:
_bill.;
_c25 cm.
504 _aIncludes bibliographical references and index
650 0 _aMetal oxide semiconductors, Complementary
_xDesign and construction
650 0 _aIntegrated circuits
_xDesign and construction
650 0 _aMetal oxide semiconductor field-effect transistors
710 2 _aInstitute of Electrical and Electronics Engineers
999 _aVIRTUA40
_c60779
_d60785
999 _aVTLSSORT0080*0200*0201*0400*0900*1000*2450*2500*2600*3000*5040*6500*6501*6502*7100*9992