000 01245nam a2200289 a 4500
001 vtls000061495
003 KUKTEM
005 20251125093329.0
008 120608t2001 pauda f 001 0 eng d
020 _a9781558995192
020 _a1558995196
039 9 _a201302131426
_bsaini
_y201206081013
_zsafura
040 _aUMP
090 _aTK7874.76 .G38 2001
245 0 0 _aGate stack and silicide issues in silicon processing :
_bsymposium held April 25-27, 2000, San Francisco, California, U.S.A. /
_ceditors L.A. Clevenger ... [et al.]
260 _aWarrendale, Pa. :
_bMaterials Research Society,
_c2001
300 _a1 v. (various pagings) :
_bill. ;
_c24 cm.
490 1 _aMaterials Research Society symposium proceedings ;
_vv. 611
504 _aIncludes bibliographical references and indexes
650 0 _aIntegrated circuits
_xUltra large scale integration
_xMaterials
_vCongresses
650 0 _aSilicides
_vCongresses
650 0 _aGate array circuits
_vCongresses
650 0 _aElectric leakage
_vCongresses
700 1 _aClevenger, L. A.
830 0 _aMaterials Research Society symposium proceedings ;
_vv. 611
999 _aVIRTUA40
_c63713
_d63719
999 _aVTLSSORT0080*0200*0201*0400*0900*2450*2600*3000*4900*5040*6500*6501*6502*6503*7000*8300*9992