000 01008nam a2200253 a 4500
001 vtls000085946
003 KUKTEM
005 20251125103040.0
008 150417t2014 gw a f 000 0 eng d
020 _a9783319023779 (hbk.)
039 9 _a201509011534
_bsafura
_y201504171551
_zezzatul
040 _aUMP
090 _aTK7874.893 .N65 2014
100 1 _aNoia, Brandon
245 1 0 _aDesign-for-test and test optimization techniques for TSV- based 3D stacked ICs /
_cBrandon Noia, Krishnendu Chakrabarty ; foreword by Vishwani Agrawal
260 _aCham :
_bSpringer,
_c2014
300 _axviii, 247 p.) :
_bill. (some col.) ;
_c24 cm.
504 _aIncludes bibliographical references
650 0 _aThree-dimensional integrated circuits
_xDesign and construction
650 0 _aThree-dimensional integrated circuits
_xTesting
700 1 _aAgrawal, Vishwani D.
700 1 _aChakrabarty, Krishnendu
999 _aVIRTUA40
_c81796
_d81802
999 _aVTLSSORT0080*0200*0400*0900*1000*2450*2600*3000*5040*6500*6501*7000*7001*9992