000 01095nam a2200277 a 4500
001 vtls000099783
003 KUKTEM
005 20251125103617.0
008 170502t2017 xxka f 001 0 eng d
020 _a9781119246299 (hbk.)
039 9 _a201904261542
_bAUTHORITY
_c201707101228
_dnazri
_y201705021645
_zfaiz
040 _aUMP
090 _aTK7871.95 .K86 2017
100 1 _aKumar, Mamidala Jagadesh
245 1 0 _aTunnel field-effect transistors (TFET) :
_bmodelling and simulations /
_cJagadesh Kumar Mamidala, Rajat Vishnoi, Pratyush Pandey
260 _aChichester, West Sussex, UK :
_bJohn Wiley & Sons,
_c2017
300 _aix, 195 p. :
_bill. ;
_c24 cm.
504 _aIncludes bibliographical references and index
650 0 _aTunnel field-effect transistors
650 0 _aIntegrated circuits
_xDesign and construction
650 0 _aNanostructured materials
650 0 _aLow voltage integrated circuits
700 1 _aVishnoi, Rajat
700 1 _aPandey, Pratyush
999 _aVIRTUA40
_c86856
_d86862
999 _aVTLSSORT0080*0200*0400*0900*1000*2450*2600*3000*5040*6500*6501*6502*6503*7000*7001*9992