| 000 | 01146nam a2200313 i 4500 | ||
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_c94027 _d94033 |
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| 003 | MY-KuUP | ||
| 005 | 20251125105717.0 | ||
| 006 | a||||fs|||| 00| 0 | ||
| 007 | cr u|||||||||| | ||
| 008 | 200104t20202020sz fsb 001 0 eng d | ||
| 020 |
_a9783030313104 _qebook |
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| 040 |
_aOhioLINK _beng _cUMP _erda |
||
| 090 | _aTK5105.546 .M36 2020 | ||
| 100 | 1 |
_aManna, Kanchan, _eauthor. |
|
| 245 | 1 | 0 |
_aDesign and test strategies for 2D/3D integration for NoC-based multicore architectures / _cKanchan Manna, Jimson Mathew |
| 264 | 1 |
_aCham : _bSpringer, _c2020 |
|
| 264 | 4 | _c©2020 | |
| 300 | _a1 online resource | ||
| 336 |
_atext _2rdacontent |
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| 337 |
_acomputer _2rdamedia |
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| 338 |
_aonline resource _2rdacarrier |
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| 504 | _aIncludes bibliographical references and index | ||
| 650 | 0 |
_aNetworks on a chip _xDesign |
|
| 650 | 0 |
_aNetworks on a chip _xTesting |
|
| 700 | 1 |
_aMathew, Jimson, _eauthor. |
|
| 856 | 4 | 0 |
_uhttps://link-springer-com.libraryumpsa.idm.oclc.org/book/10.1007/978-3-030-31310-4 _zOff-campus link |
| 856 | 4 | 0 |
_uhttps://link.springer.com/book/10.1007/978-3-030-31310-4 _zClick here (Direct link) |
| 942 |
_2lcc _cEBOOK |
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