Design for manufacturability: (Record no. 80025)

MARC details
000 -LEADER
fixed length control field 02042nam a2200253 a 4500
001 - CONTROL NUMBER
control field vtls000077299
003 - CONTROL NUMBER IDENTIFIER
control field KUKTEM
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20251125102832.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 140407t2014 nyua f 001 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781461417606 (hbk.)
039 #9 - LEVEL OF BIBLIOGRAPHIC CONTROL AND CODING DETAIL [OBSOLETE]
Level of rules in bibliographic description 201507031655
Level of effort used to assign nonsubject heading access points aida
Level of effort used to assign subject headings 201506251156
Level of effort used to assign classification aida
-- 201404071448
-- irma
040 ## - CATALOGING SOURCE
Original cataloging agency UMP
090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (RLIN)
Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) TK7867 .B35 2014
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Balasinski, Artur
245 10 - TITLE STATEMENT
Title Design for manufacturability:
Remainder of title from 1D to 4D for 90-22 nm technology nodes /
Statement of responsibility, etc. Artur Balasinski
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. New York :
Name of publisher, distributor, etc. Springer,
Date of publication, distribution, etc. 2014
300 ## - PHYSICAL DESCRIPTION
Extent viii, 278 p. :
Other physical details ill. (some col.) ;
Dimensions 24 cm.
504 ## - BIBLIOGRAPHY, ETC. NOTE
Bibliography, etc. note Includes bibliographical references
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Classic DfM: from 2D to 3D -- DfM at 28 nm and Beyond -- New DfM Domain: Stress Effects -- Conclusions and Future Work
520 ## - SUMMARY, ETC.
Summary, etc. This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package. Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes; Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package; Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources; Helps readers to translate reliability methodology into real design flows
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Electronic circuit design
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Integrated circuits
General subdivision Design
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Date acquired Cost, normal purchase price Total checkouts Full call number Barcode Date last seen Copy number Cost, replacement price Price effective from Koha item type
  Not lost     UMPLIB PEKAN UMPLIB PEKAN 04/09/2019 394.96   TK7867 .B35 2014 0000098548 04/09/2019 1 394.96 04/09/2019 Open Shelf

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